1. Field of the Invention
The present invention relates to transmitter/receiver apparatuses (such as personal computers, peripheral apparatuses thereof, and AV (audiovisual) equipment) incorporating a serial bus for serially transmitting a signal, for example a high-speed serial bus (hereinafter referred to as the “1394 serial bus”) standardized in “IEEE Standard for a High Performance Serial Bus,”—IEEE Std. 1394a-2000 (hereinafter referred to as “IEEE Std. 1394a-2000”) issued by IEEE (Institute of Electrical and Electronics Engineers).
2. Description of the Prior Art
First, IEEE Std. 1394a-2000 will be described. In recent years, networks for transmitting control signals and main signals between a personal computer and a peripheral device thereof, such as a printer, hard disk drive, or image scanner, or a visual device, such as a digital camera, or an audio device (hereinafter, such a terminal device will be referred to generically as a “node”) have come to be increasingly built with nodes adopting the 1394 serial bus (hereinafter referred to as “1394 serial bus nodes”).
FIG. 32 is a block diagram showing an example of a physical layer circuit complying with IEEE Std. 1394a-2000 (hereinafter referred to as a “1394 physical layer circuit). As shown in this figure, a conventional 1394 physical layer circuit includes a bus arbitration circuit 101, a DS-link encoder/decoder circuit 102, a link layer interface circuit 103, a register circuit 104, and three transceiver circuits 105, 106, and 107 complying with IEEE Std. 1394a-2000 (hereinafter referred to as the “1394 metal transceiver circuits 105, 106, and 107”).
The bus arbitration circuit 101 makes various settings necessary for the operation of the 1394 physical layer circuit, and controls the timing with which data signals and control signals are output to the 1394 serial bus. To the bus arbitration circuit 101 is connected the register circuit 104, in which are stored the operation conditions under which the 1394 physical layer circuit should operate. Thus, the 1394 physical layer circuit operates under the conditions stored in the register circuit 104.
The DS-link encoder/decoder circuit 102 performs modulation and demodulation by the DS-link method in order to transmit and receive, over the bus, data signals from the upper layer called the link layer. The DS-link modulation is a method of modulation whereby a data signal [Data] and a strobe signal [Strobe], which is the exclusive OR of the data signal [Data] and a clock signal, are transmitted over two pairs of transmission lines.
The link layer interface circuit 103 is a circuit that exchanges data signals and control signals with the upper, link layer. The register circuit 104 is usually controlled by the upper, link layer, and the reading and rewriting of the contents stored in the register circuit 104 are performed from the link layer through the link layer interface circuit 103. The 1394 metal transceiver circuits 105, 106, and 107 each exchange main signals and control signals with an external node over two pairs of cables.
FIG. 33 is a register map showing the contents stored in the register circuit 104 (see IEEE Std. 1394a-2000, page 125). IEEE Std. 1394a-2000 prescribes that the contents shown in this register map be rewritable only under the control from the link layer. In the register map, to the delay region [Delay] at address 0011, bits 4 to 7 is assigned the value of the transmission delay through the 1394 physical layer circuit, and to the jitter region [Jitter] at address 0100, bits 2 to 4 is assigned the value of the jitter thereof. The description of other regions will be omitted.
Next, a description will be given of a type of node that mixedly has a plurality of ports with different transmission delays. In recent years, there have been moves to adopt IEEE Std. 1394a-2000 in a home network. However, IEEE Std. 1394a-2000 prescribes that the maximum length of metal cables be 4.5 [m], and this restriction on the cable length often proves to be inconvenient.
To overcome this, standards such as “IEEE Std. 1394b” and the “OP i.LINK” standard have been formulated according to which at least one of a plurality of 1394 metal transceivers included in a 1394 physical layer circuit is replaced with an optical transceiver or the like, and the metal cables used as the transmission lines for this transceiver are replaced with an optical fiber (such as a plastic optical fiber (POF)). This makes long-distance transmission possible.
According to these standards, one node may mixedly have metal and optical transceivers. In such a case, the node may need to convert signals for a metal port into signals for an optical port and perform other extra operation, and thus the optical port can have a sufficiently long transmission delay as compared with a DS port. Even with a node complying with IEEE Std. 1394a-2000, i.e., a node having no optical transceiver, there may be differences in transmission delay among different ports, because IEEE Std. 1394a-2000 prescribes only the maximum values for the transmission delay and other specifications of a port.
Next, a description will be given of optimization of the bus. To ensure that no different nodes output packets simultaneously to the bus, IEEE Std. 1394a-2000 prescribes bus idle times (hereinafter referred to as the “gaps”) during which neither an arbitration signal nor any data signal can be transmitted. Such gaps are classified into the following four types: an acknowledge gap, which is the bus idle time between an asynchronous packet and an acknowledge packet; an isochronous gap, which is the bus idle time between an acknowledge gap and an isochronous packet; a subaction gap, which is the bus idle time between two isochronous packets; and an arbitration reset gap, which is the minimum bus idle time secured after arbitration until a port is permitted to compete for access to the bus (the bus idle time at the start of a fairness interval during which each node is permitted to transmit an asynchronous packet once). For each of these four types of gaps, IEEE Std. 1394a-2000 prescribes the minimum and maximum values.
Of the four types of gaps mentioned above, the acknowledge gap and isochronous gap are prescribed to be in the range from 0.04 [μs] to 0.05 [μs].
The subaction gap is prescribed to be in the range
      from    ⁢                  (                  27          +                      Gap_count            ×            16                          )            BASE_RATE        -            PHY_delay      max        ⁢                  ⁢    to    ⁢                  ⁢                  (                  27          +                      Gap_count            ×            16                          )            BASE_RATE        +      PHY_delay    min  
The arbitration reset gap is prescribed to be in the range
      from    ⁢                  (                  51          +                      Gap_count            ×            32                          )            BASE_RATE        -            PHY_delay      max        ⁢                  ⁢    to    ⁢                  ⁢                  (                  53          +                      Gap_count            ×            32                          )            BASE_RATE        +      PHY_delay    min  
The base rate [BASE_RATE] in the formulae above is a constant that takes a value in the range from 98.294 to 98.314 [Mbit/s]. Accordingly, to reduce these two types of gaps, it is necessary to reduce the gap count [Gap_count] and the physical layer delay [PHY_delay] in the formulae above. Here, the physical layer delay [PHY_delay] is the time required after a signal is input to a node until the signal is repeated. The gap count [Gap_count] is used for the purpose of producing gaps in such a way as to optimize the transmission efficiency according to the topology of the bus. Thus, by reducing the gap count [Gap_count] as much as possible, it is possible to enhance the transmission efficiency of the bus.
A node that manages the bus (hereinafter referred to as the “bus manager”) can know, from a self ID packet, the topology of the bus and the physical layer delay [PHY_delay] of each node, and can calculate, by using formula (1) below, the transmission delay time [Round-trip_delay] corresponding to twice the signal transmission time through the longest path excluding the physical layers at both ends.Round-trip_delay=2×(Hops−1)×(Cable_delay+PHY_delay)+2×Cable_delay   (1)
The bus manager calculates the transmission delay through the longest path in different ways according to which of the following three types of topology is adopted: (a) the bus manager is a leaf node, and is located on the longest path; (b) the bus manger is not a leaf node, and is located on the longest path; and (c) the bus manager is not located on the longest path.
In all these cases, the bus manager measures the signal propagation time [Propagation time] (the total time of all the cable delays and physical layer delays along the path) between itself and a target node, and calculates, from the result of the measurement, the transmission delay time [Round-trip_delay]. Here, the bus manager measures the signal propagation time [Propagation time] by using the transmission time of a ping packet that requests a node to return a self ID packet within a predetermined time and the time [ping time] that elapses before a self ID packet is returned in response to the ping packet, on the basis of formulae (2) and (3) below.Propagation timemin=Constant−RESPONSE_TIMEmax−2×Σ(PHY jitter)   (2)Propagation timemax=Constant−RESPONSE_TIMEmin+2×Σ(PHY jitter)   (3)
The response time [RESPONSE_TIME] in the above formulae is defined by formula (4) below.40 [ns]<RESPONSE_TIME<PHY_delay+100 [ns]  (4)
Now, how the transmission delay time [Round-trip_delay] is calculated in each of the cases (a) to (c) above will be described in detail with reference to FIG. 34. FIG. 34 is a diagram showing an example of the bus topology used to calculate the transmission delay time [Round-trip_delay].
The case (a) corresponds to a case where only the node a and the bus manager M exist in FIG. 34. Accordingly, in this case, the bus manager M measures the transmission delay time [Round-trip_delay] by using formula (3) above.
The case (b) corresponds to a case where the path between the node α and the node γ is the longest path in FIG. 34. Accordingly, in this case, the bus manager M calculates, on the basis of formula (5) below, the transmission delay time [Round-trip_delay] by measuring the individual propagation times [Propagation time] between itself and each of the nodes α and γ and adding thereto its own physical layer delay [PHY_delay].Round-trip_delay(α,γ)=Propagation timeα+Propagation timeγ+2×PHY_delay M   (5)
The case (c) corresponds to a case where the path between the node γ and the node δ is the longest path in FIG. 34. Accordingly, the bus manager M calculates, on the basis of the formula (6) below, the transmission delay time [Round-trip_delay] by measuring the individual propagation times [Propagation time] between itself and each of the nodes γ and δ and the propagation time [Propagation time] to the node located on the longest path and nearest to the bus manager M and then subtracting therefrom the doubly measured physical layer delay [PHY_delay].Round-trip_delay(γ,δ)=Propagation timeγ+Propagation timeδ+2×(Propagation timeβ−PHY_delayβ)−240 ns   (6)
By substituting the thus calculated transmission delay time [Round-trip_delay] in formula (7) below, it is possible to calculate the gap count [Gap_count] mentioned earlier.
                                                        BASE_RATE              max                        ×                          (                                                                                                                  Round                        ⁢                                                  -                                                ⁢                                                  trip_delay                          max                                                                    +                                              RESPONSE_TIME                                                  j                          ,                          max                                                                    -                                                                                                                                                          MIN_IDLE                        ⁢                        _TIME                                            +                                              PHY_delay                                                  i                          ,                          max                                                                                                                                )                                +                      29            ×                                          BASE_RATE                max                                            BASE_RATE                min                                              -          51                          32          -                      20            ×                                          BASE_RATE                max                                            BASE_RATE                min                                      ⁢                                                  ⁢                          (                                                MIN_IDLE                  ⁢                  _TIME                                =                                  0.04                  ⁢                                                                          [                                      μ                    ⁢                                                                                  ⁢                    s                                    ]                                            )                                                          (        7        )            
Next, a description will be given of the PHY register of a node complying with the OP i.LINK standard. To support optical ports complying with the OP i.LINK standard, the PHY register map according to this standard has some additional contents incorporated in the PHY register map complying with IEEE Std. 1394a-2000. With respect to the transmission delay and jitter of a node, the OP i.LINK page (see the OP i.LINK standard, ver. 2, page 85) shown in FIG. 35 is added to the base register shown in FIG. 33.
In the OP i.LINK page shown in FIG. 35, to the OP-DS region [Delay OP-DS] at address 1011, bits 0 to 3 is assigned the value of the maximum optical-port-to-DS-port transmission delay, and to the jitter OP-DS region [Jitter OP-DS] at address 1011, bits 4 to 7 is assigned the value of the maximum optical-port-to-DS-port jitter. Moreover, to the delay DS-DS region [Delay DS-DS] at the subsequent address, namely address 1100, bits 0 to 3 is assigned the value of the maximum DS-port-to-DS-port transmission delay, and to the jitter DS-DS region [Jitter DS-DS] at address 1100, bits 4 to 7 is assigned the value of the maximum DS-port-to-DS-port jitter.
Furthermore, to the regions [T0] to [T15] occupying addresses 1101 to 1110 is assigned information on whether a given port is an optical port complying with the OP i.LINK standard or a DS port. Incidentally, in the PHY register map (see FIG. 33), to the delay region [Delay] at address 0011, bits 4 to 7 is assigned the value of the maximum optical-port-to-optical-port transmission delay, and to the jitter region [Jitter] at address 0100, bits 2 to 4 is assigned the value of the maximum optical-port-to-optical-port jitter. The description of other regions will be omitted.
In a case where the bus manager, which manages the bus, is a node complying with the OP i.LINK standard, it first transmits a ping packet to a target node, and, by reading the p0 to pN fields of the self ID packets (see FIG. 36) returned therefrom, checks whether a given port is active or not. Moreover, the bus manager, by reading the regions [T0] to [T15] of the OP i.LINK page in the form of remote access packets, identifies the type of the port.
Now, consider a case where extension of the transmission distance is attempted, as described earlier, by replacing metal cables with optical fibers and replacing 1394 metal transceivers with optical transceivers. For example, in a node complying with IEEE Std. 1394a-2000 and having only DS ports, the transmission delays through the DS ports are sufficiently small, and the transmission delays through all the DS ports can be regarded as equal. Thus, any combination of these ports produces an equal physical layer delay [PHY_delay] and an equal physical layer jitter [PHY_jitter]. Accordingly, these values can be kept constant without any problem.
However, an optical port may have a larger transmission delay or a larger jitter as compared with a DS port, and the transmission delay and jitter of an optical port may vary according to the transmission speed at which it operates. As a result, different combinations of ports for conducting communication may produce different transmission delays or different jitters in a node. Thus, if the values of the transmission delay and jitter of a node are kept constant, it may be impossible to calculate the optimum signal propagation time [Propagation time]. Now, such situations will be described in more detail with reference to FIGS. 37 to 41.
First, a description will be given of the case shown in FIG. 37. A node A has four ports a101, a102, a103, and a104 each including a transmission delay in the physical layer, and it is assumed that their respective transmission delays have the relationship a102>a103>a104>a101. Moreover, it is assumed that, while the ports a101, a102, and a104 are active (in a state in which they can communicate with an external node), the port a103 is nonactive (in a state in which it cannot communicate with an external node, a state in which it is capable of communicating with an external node but is not connected to one, or a suspended state).
In this case, by the conventional method, the transmission delay of the node A is previously set equal to and kept constant at the transmission delay Al between, among all the combinations of the ports a101 to a104, those producing the largest transmission delays, namely the ports a102 and a103. However, the port a103 is nonactive and is not being used, and therefore the actual maximum transmission delay of the node A is equal to the transmission delay A1 (<A1) between the ports a102 and a104. Thus, by the conventional method, the transmission delay of the node A is set unnecessarily large. Setting the transmission delay unnecessarily large in this way is inefficient, because doing so results in increasing the signal propagation time [Propagation time], and thus results in increasing the gap count [Gap_count] and hence the gaps themselves.
Next, a description will be given of the case shown in FIG. 38. A node B has three ports b101, b102, and b103 each including a transmission delay in the physical layer, and it is assumed that their respective transmission delays have the relationship b101>>b102>>b103. Moreover, it is assumed that the transmission delay B2 after a signal is input to the port b101 until the signal is output therefrom is larger than the transmission delay between any other combination of the ports.
In this case, by the conventional method, the transmission delay of the node B is previously set equal to and kept constant at the transmission delay B1 between, among all the combinations of the ports b101 to b103, those producing the largest transmission delays, namely the ports b101 and b102. However, when a signal input to the port b101 is output therefrom, the actual transmission delay B2 is larger than the transmission delay B1 previously set as the transmission delay of the node B. This makes the gap count [Gap_count] smaller than the appropriate value, and thus may make it impossible to secure sufficient gaps.
Next, a description will be given of the case shown in FIG. 39. In a case as shown in this figure where the bus manager BM is not on the longest path, as described earlier, it is possible to calculate the transmission delay time [Round-trip_delay] by using formula (6) noted earlier.
In this case, by the conventional method, the transmission delay of the node is set equal to the maximum port-to-port transmission delay. Thus, the value of PHY_delay_{Node_C0} is set equal to a transmission delay unrelated to the transmission delay C3, i.e., a transmission delay different from PHY_delay_{Node_C0} as intended by formula (6). Setting the transmission delay at an unintended value in this way is inefficient, because doing so results in increasing the signal propagation time [Propagation time], and thus results in increasing the gap count [Gap_count] and hence the gaps themselves.
Incidentally, as described earlier, in a node complying with the OP i.LINK standard, the value of the optical-port-to-optical-port transmission delay is stored in the delay region allocated in its base register, and the values of the optical-port-to-DS-port and DS-port-to-DS-port transmission delays are stored in the delay OP-DS region and delay DS-DS region, respectively, allocated in the OP i.LINK page (see FIG. 35). Accordingly, in a case where the bus manager located on the bus is a node complying with the OP i.LINK standard, the bus manager can read out not only the value of the optical-port-to-optical-port transmission delay stored in the base register but also the values of the optical-port-to-DS-port and DS-port-to-DS-port transmission delays stored in the OP i.LINK page.
However, in a case where the bus manager located on the bus is a node that does not comply with the OP i.LINK standard, the bus manager can read out only the value of the optical-port-to-optical-port transmission delay stored in the base register. Accordingly, when only a DS port is active in a node complying with the OP i.LINK standard and having an optical port, the bus manager, which does not comply with the OP i.LINK standard, recognizes as the transmission delay of the node not the DS-port-to-DS-port transmission delay but the optical-port-to-optical-port transmission delay, which is larger that the former. Setting the transmission delay unnecessarily large in this way is inefficient, because doing so results in increasing the gap count [Gap_count] and hence the gaps themselves.
Next, a description will be given of the case shown in FIG. 40. A node E has four ports e101, e102, e103, and e104 each including a transmission delay in the physical layer. It is assumed that, while the ports e101, e102, and e104 are active, the port e103 is nonactive.
In this case, by the conventional method, if, among all the combinations of the ports e101 to e104, the combination of the ports e102 and e103 produces the largest jitter, the jitter of the node E is previously set equal to and kept constant at that jitter E1. However, the port e103 is nonactive and is not being used, and therefore, by the conventional method, the jitter of the node E is set unnecessarily large. Setting the jitter unnecessarily large in this way is inefficient, because doing so results in increasing the gap count [Gap_count] and hence the gaps themselves.
Lastly, a description will be given of the case shown in FIG. 41. The node F_0 shown in this figure is ready for communication, with its ports f101, f102, f103, and f104 connected to nodes F_1, F_2, F_3, and F_4, respectively. It is assumed that, among those combinations of the ports which include the port f101, the combination of the ports f101 and f102 produces the largest jitter F1, and that, among all the combinations of the ports f101 to f104, the combination of the ports f102 and f103 produces the largest jitter F2.
In this case, by the conventional method, the jitter of the node F_0 is previously set equal to and kept constant at the largest jitter F2 among all the combinations of the ports. However, the value needed to calculate the signal propagation time [Propagation time] is the largest jitter among those combinations of the ports which include the port to which a signal is input. Thus, for example, when a control signal is input via the port f101 connected to the node F_1, by the conventional method, the jitter of the node F_0 is set unnecessarily large. Setting the jitter unnecessarily large in this way is inefficient, because doing so results in increasing the gap count [Gap_count] and hence the gaps themselves.
As described earlier, in a node complying with the OP i.LINK standard, the value of the optical-port-to-optical-port jitter is stored in the jitter region allocated in its base register, and the values of the optical-port-to-DS-port and DS-port-to-DS-port jitters are stored in the jitter OP-DS region and jitter DS-DS region, respectively, allocated in the OP i.LINK page (see FIG. 35). Accordingly, in a case where the bus manager located on the bus is a node complying with the OP i.LINK standard, the bus manager can read out not only the value of the optical-port-to-optical-port jitter stored in the base register but also the values of the optical-port-to-DS-port and DS-port-to-DS-port jitters stored in the OP i.LINK page.
However, in a case where the bus manager located on the bus is a node that does not comply with the OP i.LINK standard, the bus manager can read out only the value of the optical-port-to-optical-port jitter stored in the base register. Accordingly, when only a DS port is active in a node complying with the OP i.LINK standard and having an optical port, the bus manager, which does not comply with the OP i.LINK standard, recognizes as the jitter of the node not the DS-port-to-DS-port jitter but the optical-port-to-optical-port jitter, which is larger that the former. Setting the jitter unnecessarily large in this way is inefficient, because doing so results in increasing the gap count [Gap_count] and hence the gaps themselves.